Generally, digital line drivers use multistage differential topologies to increase the output signal swing and the power delivered from a single supply. The use of a single differential amplifier helps reduce the area and power required to deliver a larger output signal swing. In such cases, using a very well known and wide spread frequency compensated multistage nested Miller architecture for amplifiers helps improve the odd-harmonic linearity since there are multiple negative feedback loops that correct for the linearity of a class AB output stage.
However, one problem with using the multistage nested Miller architecture is that the output stage not only has odd-order harmonics but also has even-order harmonics. The even-order harmonics contribute to non-linearity. Since the multistage nested Miller architecture uses the differential scheme, the negative feedback loops have no impact on reducing the even-order harmonics. The common-mode feedback amplifier used to set the output common voltage is actually the loop that attenuates the even-order harmonics. The differential scheme helps improve the even-order harmonic performance further. Current solutions for the common mode feedback use a gm/gm amplifier to control the current in the second stage of the differential amplifier which then sets the common mode for the output stage.
The first stage in the differential loop has its own common mode feedback loop. This helps meet the stability requirements of both the common mode loops, but in the process of stabilizing, the first stage makes the gain-bandwidth of the output common mode loop similar to a two stage amplifier. In a three stage differential amplifier the even-order harmonics are attenuated using a two stage amplifier and the odd-order harmonics are attenuated by a three stage amplifier. The line driver's performance in a three stage differential amplifier is limited more by second harmonics than the odd harmonics despite the differential output stage, because the rejection of the even-order harmonics is significantly poor due to large differences in the current in the output stage under a low resistive load. Effectively, the combined rejection of the common mode feedback loop and the differential closed loop is generally not sufficient to reject the even-order harmonics to the same extent as a three stage nested Miller rejection of the odd harmonics.
Therefore, using the multistage differential amplifier for low resistive load applications can result in low second harmonic performance. The first option available to alleviate this problem is to use two single ended amplifiers, but this would significantly increase the power requirement for each of the amplifiers. The second option available is to use three stages in the differential loops for the common mode feedback loop, but this can be a significantly complex solution, since the differential loop is generally designed for handling a complete signal swing and hence can have larger capacitive loads at the internal nodes. The third option available would be to build a very high bandwidth two stage common mode loop to give more attenuation of the even-order harmonics, but this solution can result in requiring significantly more silicon area and power.